Memory Management
The illusion that every process owns all of memory — virtual memory, paging, page faults, and the TLB.
Virtual Memory
Every process sees a private, contiguous virtual address space starting at 0 — an illusion the OS + MMU maintain. Real (physical) RAM is shared and fragmented; the Memory Management Unit translates virtual → physical addresses on every access using page tables.
Paging
Virtual and physical memory are split into fixed-size pages / frames (typically 4 KB). A page table maps each virtual page to a physical frame. This kills external fragmentation — any free frame fits any page.
TLB & Page Faults
A page-table lookup on every memory access would be brutally slow, so the MMU caches recent translations in the TLB (Translation Lookaside Buffer). A TLB hit is ~1 cycle; a miss walks the page table.
A page fault fires when a page isn’t in RAM. The OS pauses the process, loads the page from disk into a free frame (evicting another if needed), updates the page table, and resumes. Rare = fine; constant = thrashing.
Page Replacement
| Policy | Evicts… | Note |
|---|---|---|
| FIFO | Oldest-loaded page | Simple; suffers Bélády’s anomaly |
| LRU | Least recently used | Great in practice; costly to track exactly |
| Optimal | Page used farthest in the future | Theoretical baseline — needs the future |
| Clock | LRU approximation via a reference bit | What real kernels use |
Interview Questions
What problem does virtual memory solve?
Isolation between processes, the ability to run programs larger than physical RAM (via paging), and a uniform address layout that simplifies linking and loading.
Internal vs external fragmentation?
Internal: wasted space inside an allocated block (a page not fully used). External: enough total free memory but no single contiguous chunk large enough. Paging eliminates external fragmentation but allows a little internal.
What is the TLB and why does it matter?
A cache of recent virtual→physical translations in the MMU. Without it, every access would need a page-table walk; a high TLB hit rate is critical to performance.
Define thrashing and how to fix it.
The system pages so heavily that throughput collapses. Fix by increasing RAM, lowering the multiprogramming degree, or shrinking each process’s working set.